Trends of Next-Generation Semiconductor 3D Integration Technology (Researched in April 2021)

Language:
Japanese
Product Code No:
R63200802
Issued In:
2021/08
#of Pages:
44
Publication Cycle:
  
Format:
PDF
Geographic Coverage:
Japan
Industry:
Jump to the Japanese Page:
次世代半導体3D集積技術の動向（2021年4月調査）

Price

30,000 yen ($206.90)
(excluding consumption tax)
60,000 yen ($413.79)
(excluding consumption tax)
90,000 yen ($620.69)
(excluding consumption tax)
* Equivalent value in US$ (Today's rate : $1= 145 yen , 2025/05/10 Japan)
*Scope of Each License Type

Coverage: (Product/service)

Semiconductor, 3D Integration Technology

Research Content:

This report was compiled based on an article introduced in our periodical, “Yano E plus” of May 2021 issue.

 

– CFETs, which vertically laminate nMOS and pMOS, are attracting attention as a cutting-edge 3D integration technology. Meanwhile, silicon die integration technology is also advancing at a rapid pace. –

 

1. Three-Dimensional (3D) Integration Technology to be a Key for Higher Density

 

2. 3D Integration Technology of Si Die

 

3. Transition and Forecast of Market Size of 3D Integration Semiconductor

 

4. What Companies and Research Institutes Do

4-1. Okayama University of Science

4-2. National Institute of Advanced Industrial Science and Technology (AIST) (1) Front-end

4-3. National Institute of Advanced Industrial Science and Technology (AIST) (2) Back-end

4-4. Tokyo Institute of Technology

4-5. The University of Tokyo

4-6. Tohoku MicroTec Co., Ltd.

 

5. Future Prospects

Price

written in Japanese
30,000 yen ($206.90)
(excluding consumption tax)
60,000 yen ($413.79)
(excluding consumption tax)
90,000 yen ($620.69)
(excluding consumption tax)
* Equivalent value in US$ (Today's rate : $1= 145 yen , 2025/05/10 Japan)
*Scope of Each License Type